circuit Bru2 :
  module Bru2 :
    input clock : Clock
    input reset : UInt<1>
    input io_pstate_n : UInt<1>
    input io_pstate_z : UInt<1>
    input io_pstate_c : UInt<1>
    input io_pstate_v : UInt<1>
    input io_inst : UInt<32>
    input io_PC : UInt<64>
    input io_regRn : UInt<64>
    input io_regRt : UInt<64>
    output io_RnIndex : UInt<5>
    output io_RtIndex : UInt<5>
    output io_LinkFlag : UInt<1>
    output io_LinkData : UInt<64>
    output io_jumpAddr : UInt<64>

    node _BHit_T = and(io_inst, UInt<32>("hfc000000")) @[Bru2.scala 53:26]
    node _BHit_T_1 = eq(UInt<29>("h14000000"), _BHit_T) @[Bru2.scala 53:26]
    node _BHit_T_2 = mux(_BHit_T_1, UInt<1>("h1"), UInt<1>("h0")) @[Bru2.scala 53:17]
    node _BLHit_T = and(io_inst, UInt<32>("hfc000000")) @[Bru2.scala 54:26]
    node _BLHit_T_1 = eq(UInt<32>("h94000000"), _BLHit_T) @[Bru2.scala 54:26]
    node _BLHit_T_2 = mux(_BLHit_T_1, UInt<1>("h1"), UInt<1>("h0")) @[Bru2.scala 54:17]
    node _BRHit_T = and(io_inst, UInt<32>("hfffffc1f")) @[Bru2.scala 55:26]
    node _BRHit_T_1 = eq(UInt<32>("hd61f0000"), _BRHit_T) @[Bru2.scala 55:26]
    node _BRHit_T_2 = mux(_BRHit_T_1, UInt<1>("h1"), UInt<1>("h0")) @[Bru2.scala 55:17]
    node _BLRHit_T = and(io_inst, UInt<32>("hfffffc1f")) @[Bru2.scala 56:26]
    node _BLRHit_T_1 = eq(UInt<32>("hd63f0000"), _BLRHit_T) @[Bru2.scala 56:26]
    node _BLRHit_T_2 = mux(_BLRHit_T_1, UInt<1>("h1"), UInt<1>("h0")) @[Bru2.scala 56:17]
    node _RETHit_T = and(io_inst, UInt<32>("hfffffc1f")) @[Bru2.scala 57:26]
    node _RETHit_T_1 = eq(UInt<32>("hd65f0000"), _RETHit_T) @[Bru2.scala 57:26]
    node _RETHit_T_2 = mux(_RETHit_T_1, UInt<1>("h1"), UInt<1>("h0")) @[Bru2.scala 57:17]
    node _BCONHit_T = and(io_inst, UInt<32>("hff000010")) @[Bru2.scala 58:26]
    node _BCONHit_T_1 = eq(UInt<31>("h54000000"), _BCONHit_T) @[Bru2.scala 58:26]
    node _BCONHit_T_2 = mux(_BCONHit_T_1, UInt<1>("h1"), UInt<1>("h0")) @[Bru2.scala 58:17]
    node _CBNZHit_T = and(io_inst, UInt<31>("h7f000000")) @[Bru2.scala 59:26]
    node _CBNZHit_T_1 = eq(UInt<30>("h35000000"), _CBNZHit_T) @[Bru2.scala 59:26]
    node _CBNZHit_T_2 = mux(_CBNZHit_T_1, UInt<1>("h1"), UInt<1>("h0")) @[Bru2.scala 59:17]
    node _CBZHit_T = and(io_inst, UInt<31>("h7f000000")) @[Bru2.scala 60:26]
    node _CBZHit_T_1 = eq(UInt<30>("h34000000"), _CBZHit_T) @[Bru2.scala 60:26]
    node _CBZHit_T_2 = mux(_CBZHit_T_1, UInt<1>("h1"), UInt<1>("h0")) @[Bru2.scala 60:17]
    node _TBNZHit_T = and(io_inst, UInt<31>("h7f000000")) @[Bru2.scala 61:26]
    node _TBNZHit_T_1 = eq(UInt<30>("h37000000"), _TBNZHit_T) @[Bru2.scala 61:26]
    node _TBNZHit_T_2 = mux(_TBNZHit_T_1, UInt<1>("h1"), UInt<1>("h0")) @[Bru2.scala 61:17]
    node _TBZHit_T = and(io_inst, UInt<31>("h7f000000")) @[Bru2.scala 62:26]
    node _TBZHit_T_1 = eq(UInt<30>("h36000000"), _TBZHit_T) @[Bru2.scala 62:26]
    node _TBZHit_T_2 = mux(_TBZHit_T_1, UInt<1>("h1"), UInt<1>("h0")) @[Bru2.scala 62:17]
    reg RnIndex_r : UInt<5>, clock with :
      reset => (UInt<1>("h0"), RnIndex_r) @[Bru2.scala 65:27]
    reg RtIndex_r : UInt<5>, clock with :
      reset => (UInt<1>("h0"), RtIndex_r) @[Bru2.scala 66:27]
    node _RnIndex_r_T = bits(io_inst, 9, 5) @[Bru2.scala 67:23]
    node _RtIndex_r_T = bits(io_inst, 4, 0) @[Bru2.scala 68:23]
    node _imm28_26_T = bits(io_inst, 25, 0) @[Bru2.scala 74:23]
    node _imm28_26_T_1 = shl(_imm28_26_T, 2) @[Bru2.scala 74:30]
    node imm28_26 = _imm28_26_T_1 @[Bru2.scala 73:22 74:12]
    node _imm64_28_T = bits(imm28_26, 26, 26) @[Bru2.scala 76:35]
    node _imm64_28_T_1 = bits(_imm64_28_T, 0, 0) @[Bitwise.scala 74:15]
    node _imm64_28_T_2 = mux(_imm64_28_T_1, UInt<36>("hfffffffff"), UInt<36>("h0")) @[Bitwise.scala 74:12]
    node _imm64_28_T_3 = cat(_imm64_28_T_2, imm28_26) @[Cat.scala 31:58]
    node _imm21_19_T = bits(io_inst, 23, 5) @[Bru2.scala 80:23]
    node _imm21_19_T_1 = shl(_imm21_19_T, 2) @[Bru2.scala 80:30]
    node imm21_19 = _imm21_19_T_1 @[Bru2.scala 79:22 80:12]
    node _imm64_21_T = bits(imm21_19, 20, 20) @[Bru2.scala 82:35]
    node _imm64_21_T_1 = bits(_imm64_21_T, 0, 0) @[Bitwise.scala 74:15]
    node _imm64_21_T_2 = mux(_imm64_21_T_1, UInt<43>("h7ffffffffff"), UInt<43>("h0")) @[Bitwise.scala 74:12]
    node _imm64_21_T_3 = cat(_imm64_21_T_2, imm21_19) @[Cat.scala 31:58]
    node _imm16_14_T = bits(io_inst, 18, 5) @[Bru2.scala 86:23]
    node _imm16_14_T_1 = shl(_imm16_14_T, 2) @[Bru2.scala 86:30]
    node imm16_14 = _imm16_14_T_1 @[Bru2.scala 85:22 86:12]
    node _imm64_16_T = bits(imm16_14, 15, 15) @[Bru2.scala 88:35]
    node _imm64_16_T_1 = bits(_imm64_16_T, 0, 0) @[Bitwise.scala 74:15]
    node _imm64_16_T_2 = mux(_imm64_16_T_1, UInt<49>("h1ffffffffffff"), UInt<49>("h0")) @[Bitwise.scala 74:12]
    node _imm64_16_T_3 = cat(_imm64_16_T_2, imm16_14) @[Cat.scala 31:58]
    node _BcondFlag_T = bits(io_inst, 3, 0) @[Bru2.scala 94:15]
    node _BcondFlag_T_1 = eq(_BcondFlag_T, UInt<1>("h0")) @[Bru2.scala 94:21]
    node _BcondFlag_T_2 = eq(io_pstate_z, UInt<1>("h1")) @[Bru2.scala 94:52]
    node _BcondFlag_T_3 = and(_BcondFlag_T_1, _BcondFlag_T_2) @[Bru2.scala 94:36]
    node _BcondFlag_T_4 = bits(io_inst, 3, 0) @[Bru2.scala 95:15]
    node _BcondFlag_T_5 = eq(_BcondFlag_T_4, UInt<1>("h1")) @[Bru2.scala 95:21]
    node _BcondFlag_T_6 = eq(io_pstate_z, UInt<1>("h0")) @[Bru2.scala 95:52]
    node _BcondFlag_T_7 = and(_BcondFlag_T_5, _BcondFlag_T_6) @[Bru2.scala 95:36]
    node _BcondFlag_T_8 = bits(io_inst, 3, 0) @[Bru2.scala 96:15]
    node _BcondFlag_T_9 = eq(_BcondFlag_T_8, UInt<2>("h2")) @[Bru2.scala 96:21]
    node _BcondFlag_T_10 = eq(io_pstate_c, UInt<1>("h1")) @[Bru2.scala 96:52]
    node _BcondFlag_T_11 = and(_BcondFlag_T_9, _BcondFlag_T_10) @[Bru2.scala 96:36]
    node _BcondFlag_T_12 = bits(io_inst, 3, 0) @[Bru2.scala 97:15]
    node _BcondFlag_T_13 = eq(_BcondFlag_T_12, UInt<2>("h3")) @[Bru2.scala 97:21]
    node _BcondFlag_T_14 = eq(io_pstate_c, UInt<1>("h0")) @[Bru2.scala 97:52]
    node _BcondFlag_T_15 = and(_BcondFlag_T_13, _BcondFlag_T_14) @[Bru2.scala 97:36]
    node _BcondFlag_T_16 = bits(io_inst, 3, 0) @[Bru2.scala 98:15]
    node _BcondFlag_T_17 = eq(_BcondFlag_T_16, UInt<3>("h4")) @[Bru2.scala 98:21]
    node _BcondFlag_T_18 = eq(io_pstate_n, UInt<1>("h1")) @[Bru2.scala 98:52]
    node _BcondFlag_T_19 = and(_BcondFlag_T_17, _BcondFlag_T_18) @[Bru2.scala 98:36]
    node _BcondFlag_T_20 = bits(io_inst, 3, 0) @[Bru2.scala 99:15]
    node _BcondFlag_T_21 = eq(_BcondFlag_T_20, UInt<3>("h5")) @[Bru2.scala 99:21]
    node _BcondFlag_T_22 = eq(io_pstate_n, UInt<1>("h0")) @[Bru2.scala 99:52]
    node _BcondFlag_T_23 = and(_BcondFlag_T_21, _BcondFlag_T_22) @[Bru2.scala 99:36]
    node _BcondFlag_T_24 = bits(io_inst, 3, 0) @[Bru2.scala 100:15]
    node _BcondFlag_T_25 = eq(_BcondFlag_T_24, UInt<3>("h6")) @[Bru2.scala 100:21]
    node _BcondFlag_T_26 = eq(io_pstate_v, UInt<1>("h1")) @[Bru2.scala 100:52]
    node _BcondFlag_T_27 = and(_BcondFlag_T_25, _BcondFlag_T_26) @[Bru2.scala 100:36]
    node _BcondFlag_T_28 = bits(io_inst, 3, 0) @[Bru2.scala 101:15]
    node _BcondFlag_T_29 = eq(_BcondFlag_T_28, UInt<3>("h7")) @[Bru2.scala 101:21]
    node _BcondFlag_T_30 = eq(io_pstate_v, UInt<1>("h0")) @[Bru2.scala 101:52]
    node _BcondFlag_T_31 = and(_BcondFlag_T_29, _BcondFlag_T_30) @[Bru2.scala 101:36]
    node _BcondFlag_T_32 = bits(io_inst, 3, 0) @[Bru2.scala 102:15]
    node _BcondFlag_T_33 = eq(_BcondFlag_T_32, UInt<4>("h8")) @[Bru2.scala 102:21]
    node _BcondFlag_T_34 = eq(io_pstate_c, UInt<1>("h1")) @[Bru2.scala 102:53]
    node _BcondFlag_T_35 = eq(io_pstate_z, UInt<1>("h0")) @[Bru2.scala 102:76]
    node _BcondFlag_T_36 = and(_BcondFlag_T_34, _BcondFlag_T_35) @[Bru2.scala 102:61]
    node _BcondFlag_T_37 = and(_BcondFlag_T_33, _BcondFlag_T_36) @[Bru2.scala 102:36]
    node _BcondFlag_T_38 = bits(io_inst, 3, 0) @[Bru2.scala 103:15]
    node _BcondFlag_T_39 = eq(_BcondFlag_T_38, UInt<4>("h9")) @[Bru2.scala 103:21]
    node _BcondFlag_T_40 = eq(io_pstate_c, UInt<1>("h1")) @[Bru2.scala 103:54]
    node _BcondFlag_T_41 = eq(io_pstate_z, UInt<1>("h0")) @[Bru2.scala 103:77]
    node _BcondFlag_T_42 = and(_BcondFlag_T_40, _BcondFlag_T_41) @[Bru2.scala 103:62]
    node _BcondFlag_T_43 = eq(_BcondFlag_T_42, UInt<1>("h0")) @[Bru2.scala 103:40]
    node _BcondFlag_T_44 = and(_BcondFlag_T_39, _BcondFlag_T_43) @[Bru2.scala 103:36]
    node _BcondFlag_T_45 = bits(io_inst, 3, 0) @[Bru2.scala 104:15]
    node _BcondFlag_T_46 = eq(_BcondFlag_T_45, UInt<4>("ha")) @[Bru2.scala 104:21]
    node _BcondFlag_T_47 = eq(io_pstate_n, io_pstate_v) @[Bru2.scala 104:53]
    node _BcondFlag_T_48 = and(_BcondFlag_T_46, _BcondFlag_T_47) @[Bru2.scala 104:36]
    node _BcondFlag_T_49 = bits(io_inst, 3, 0) @[Bru2.scala 105:15]
    node _BcondFlag_T_50 = eq(_BcondFlag_T_49, UInt<4>("hb")) @[Bru2.scala 105:21]
    node _BcondFlag_T_51 = eq(io_pstate_n, io_pstate_v) @[Bru2.scala 105:54]
    node _BcondFlag_T_52 = eq(_BcondFlag_T_51, UInt<1>("h0")) @[Bru2.scala 105:40]
    node _BcondFlag_T_53 = and(_BcondFlag_T_50, _BcondFlag_T_52) @[Bru2.scala 105:36]
    node _BcondFlag_T_54 = bits(io_inst, 3, 0) @[Bru2.scala 106:15]
    node _BcondFlag_T_55 = eq(_BcondFlag_T_54, UInt<4>("hc")) @[Bru2.scala 106:21]
    node _BcondFlag_T_56 = eq(io_pstate_n, io_pstate_v) @[Bru2.scala 106:53]
    node _BcondFlag_T_57 = eq(io_pstate_z, UInt<1>("h0")) @[Bru2.scala 106:84]
    node _BcondFlag_T_58 = and(_BcondFlag_T_56, _BcondFlag_T_57) @[Bru2.scala 106:69]
    node _BcondFlag_T_59 = and(_BcondFlag_T_55, _BcondFlag_T_58) @[Bru2.scala 106:36]
    node _BcondFlag_T_60 = bits(io_inst, 3, 0) @[Bru2.scala 107:15]
    node _BcondFlag_T_61 = eq(_BcondFlag_T_60, UInt<4>("hd")) @[Bru2.scala 107:21]
    node _BcondFlag_T_62 = eq(io_pstate_n, io_pstate_v) @[Bru2.scala 107:54]
    node _BcondFlag_T_63 = eq(io_pstate_z, UInt<1>("h0")) @[Bru2.scala 107:85]
    node _BcondFlag_T_64 = and(_BcondFlag_T_62, _BcondFlag_T_63) @[Bru2.scala 107:70]
    node _BcondFlag_T_65 = eq(_BcondFlag_T_64, UInt<1>("h0")) @[Bru2.scala 107:40]
    node _BcondFlag_T_66 = and(_BcondFlag_T_61, _BcondFlag_T_65) @[Bru2.scala 107:36]
    node _BcondFlag_T_67 = bits(io_inst, 3, 0) @[Bru2.scala 108:15]
    node _BcondFlag_T_68 = eq(_BcondFlag_T_67, UInt<4>("he")) @[Bru2.scala 108:21]
    node _BcondFlag_T_69 = bits(io_inst, 3, 0) @[Bru2.scala 109:15]
    node _BcondFlag_T_70 = eq(_BcondFlag_T_69, UInt<4>("hf")) @[Bru2.scala 109:21]
    node _BcondFlag_T_71 = mux(_BcondFlag_T_70, UInt<1>("h1"), UInt<1>("h0")) @[Mux.scala 101:16]
    node _BcondFlag_T_72 = mux(_BcondFlag_T_68, UInt<1>("h1"), _BcondFlag_T_71) @[Mux.scala 101:16]
    node _BcondFlag_T_73 = mux(_BcondFlag_T_66, UInt<1>("h1"), _BcondFlag_T_72) @[Mux.scala 101:16]
    node _BcondFlag_T_74 = mux(_BcondFlag_T_59, UInt<1>("h1"), _BcondFlag_T_73) @[Mux.scala 101:16]
    node _BcondFlag_T_75 = mux(_BcondFlag_T_53, UInt<1>("h1"), _BcondFlag_T_74) @[Mux.scala 101:16]
    node _BcondFlag_T_76 = mux(_BcondFlag_T_48, UInt<1>("h1"), _BcondFlag_T_75) @[Mux.scala 101:16]
    node _BcondFlag_T_77 = mux(_BcondFlag_T_44, UInt<1>("h1"), _BcondFlag_T_76) @[Mux.scala 101:16]
    node _BcondFlag_T_78 = mux(_BcondFlag_T_37, UInt<1>("h1"), _BcondFlag_T_77) @[Mux.scala 101:16]
    node _BcondFlag_T_79 = mux(_BcondFlag_T_31, UInt<1>("h1"), _BcondFlag_T_78) @[Mux.scala 101:16]
    node _BcondFlag_T_80 = mux(_BcondFlag_T_27, UInt<1>("h1"), _BcondFlag_T_79) @[Mux.scala 101:16]
    node _BcondFlag_T_81 = mux(_BcondFlag_T_23, UInt<1>("h1"), _BcondFlag_T_80) @[Mux.scala 101:16]
    node _BcondFlag_T_82 = mux(_BcondFlag_T_19, UInt<1>("h1"), _BcondFlag_T_81) @[Mux.scala 101:16]
    node _BcondFlag_T_83 = mux(_BcondFlag_T_15, UInt<1>("h1"), _BcondFlag_T_82) @[Mux.scala 101:16]
    node _BcondFlag_T_84 = mux(_BcondFlag_T_11, UInt<1>("h1"), _BcondFlag_T_83) @[Mux.scala 101:16]
    node _BcondFlag_T_85 = mux(_BcondFlag_T_7, UInt<1>("h1"), _BcondFlag_T_84) @[Mux.scala 101:16]
    node _BcondFlag_T_86 = mux(_BcondFlag_T_3, UInt<1>("h1"), _BcondFlag_T_85) @[Mux.scala 101:16]
    node _C32Flag_T = bits(io_inst, 31, 31) @[Bru2.scala 117:30]
    node _C32Flag_T_1 = eq(_C32Flag_T, UInt<1>("h0")) @[Bru2.scala 117:36]
    node _C32Flag_T_2 = mux(_C32Flag_T_1, UInt<1>("h1"), UInt<1>("h0")) @[Bru2.scala 117:22]
    node _T = bits(io_regRt, 31, 0) @[Bru2.scala 119:18]
    node _T_1 = eq(_T, UInt<1>("h0")) @[Bru2.scala 119:25]
    node _GEN_0 = mux(_T_1, UInt<1>("h1"), UInt<1>("h0")) @[Bru2.scala 119:33 120:20 123:20]
    node _GEN_1 = mux(_T_1, UInt<1>("h0"), UInt<1>("h1")) @[Bru2.scala 119:33 121:20 124:20]
    node _T_2 = eq(io_regRt, UInt<1>("h0")) @[Bru2.scala 127:19]
    node _GEN_2 = mux(_T_2, UInt<1>("h1"), UInt<1>("h0")) @[Bru2.scala 127:27 128:20 131:20]
    node _GEN_3 = mux(_T_2, UInt<1>("h0"), UInt<1>("h1")) @[Bru2.scala 127:27 129:20 132:20]
    node C32Flag = _C32Flag_T_2 @[Bru2.scala 114:26 117:16]
    node _GEN_4 = mux(C32Flag, _GEN_0, _GEN_2) @[Bru2.scala 118:16]
    node _GEN_5 = mux(C32Flag, _GEN_1, _GEN_3) @[Bru2.scala 118:16]
    node _TBZJumpFlag_T = bits(io_inst, 31, 31) @[Bru2.scala 139:44]
    node _TBZJumpFlag_T_1 = bits(io_inst, 23, 19) @[Bru2.scala 139:56]
    node _TBZJumpFlag_T_2 = cat(_TBZJumpFlag_T, _TBZJumpFlag_T_1) @[Cat.scala 31:58]
    node _TBZJumpFlag_T_3 = dshr(io_regRt, _TBZJumpFlag_T_2) @[Bru2.scala 139:32]
    node _TBZJumpFlag_T_4 = bits(_TBZJumpFlag_T_3, 0, 0) @[Bru2.scala 139:32]
    node _TBZJumpFlag_T_5 = eq(_TBZJumpFlag_T_4, UInt<1>("h0")) @[Bru2.scala 139:66]
    node _TBZJumpFlag_T_6 = mux(_TBZJumpFlag_T_5, UInt<1>("h1"), UInt<1>("h0")) @[Bru2.scala 139:23]
    node _TBNZJumpFlag_T = bits(io_inst, 31, 31) @[Bru2.scala 140:44]
    node _TBNZJumpFlag_T_1 = bits(io_inst, 23, 19) @[Bru2.scala 140:56]
    node _TBNZJumpFlag_T_2 = cat(_TBNZJumpFlag_T, _TBNZJumpFlag_T_1) @[Cat.scala 31:58]
    node _TBNZJumpFlag_T_3 = dshr(io_regRt, _TBNZJumpFlag_T_2) @[Bru2.scala 140:32]
    node _TBNZJumpFlag_T_4 = bits(_TBNZJumpFlag_T_3, 0, 0) @[Bru2.scala 140:32]
    node _TBNZJumpFlag_T_5 = eq(_TBNZJumpFlag_T_4, UInt<1>("h1")) @[Bru2.scala 140:66]
    node _TBNZJumpFlag_T_6 = mux(_TBNZJumpFlag_T_5, UInt<1>("h1"), UInt<1>("h0")) @[Bru2.scala 140:23]
    reg BJump_r : UInt<1>, clock with :
      reset => (UInt<1>("h0"), BJump_r) @[Bru2.scala 143:28]
    reg BLJump_r : UInt<1>, clock with :
      reset => (UInt<1>("h0"), BLJump_r) @[Bru2.scala 144:28]
    reg BRJump_r : UInt<1>, clock with :
      reset => (UInt<1>("h0"), BRJump_r) @[Bru2.scala 145:28]
    reg BLRJump_r : UInt<1>, clock with :
      reset => (UInt<1>("h0"), BLRJump_r) @[Bru2.scala 146:28]
    reg RETJump_r : UInt<1>, clock with :
      reset => (UInt<1>("h0"), RETJump_r) @[Bru2.scala 147:28]
    reg BCONJump_r : UInt<1>, clock with :
      reset => (UInt<1>("h0"), BCONJump_r) @[Bru2.scala 148:28]
    reg CBNZJump_r : UInt<1>, clock with :
      reset => (UInt<1>("h0"), CBNZJump_r) @[Bru2.scala 149:28]
    reg CBZJump_r : UInt<1>, clock with :
      reset => (UInt<1>("h0"), CBZJump_r) @[Bru2.scala 150:28]
    reg TBNZJump_r : UInt<1>, clock with :
      reset => (UInt<1>("h0"), TBNZJump_r) @[Bru2.scala 151:28]
    reg TBZJump_r : UInt<1>, clock with :
      reset => (UInt<1>("h0"), TBZJump_r) @[Bru2.scala 152:28]
    node BCONHit = _BCONHit_T_2 @[Bru2.scala 47:22 58:11]
    node BcondFlag = _BcondFlag_T_86 @[Bru2.scala 91:23 92:13]
    node _BCONJump_r_T = and(BCONHit, BcondFlag) @[Bru2.scala 159:25]
    node CBNZHit = _CBNZHit_T_2 @[Bru2.scala 48:22 59:11]
    node CBNZJumpFlag = _GEN_5 @[Bru2.scala 116:26]
    node _CBNZJump_r_T = and(CBNZHit, CBNZJumpFlag) @[Bru2.scala 160:25]
    node CBZHit = _CBZHit_T_2 @[Bru2.scala 49:22 60:11]
    node CBZJumpFlag = _GEN_4 @[Bru2.scala 115:26]
    node _CBZJump_r_T = and(CBZHit, CBZJumpFlag) @[Bru2.scala 161:25]
    node TBNZHit = _TBNZHit_T_2 @[Bru2.scala 50:22 61:11]
    node TBNZJumpFlag = _TBNZJumpFlag_T_6 @[Bru2.scala 138:26 140:17]
    node _TBNZJump_r_T = and(TBNZHit, TBNZJumpFlag) @[Bru2.scala 162:25]
    node TBZHit = _TBZHit_T_2 @[Bru2.scala 51:22 62:11]
    node TBZJumpFlag = _TBZJumpFlag_T_6 @[Bru2.scala 137:26 139:17]
    node _TBZJump_r_T = and(TBZHit, TBZJumpFlag) @[Bru2.scala 163:25]
    reg LinkFlag_r : UInt<1>, clock with :
      reset => (UInt<1>("h0"), LinkFlag_r) @[Bru2.scala 166:28]
    reg LinkData_r : UInt<32>, clock with :
      reset => (UInt<1>("h0"), LinkData_r) @[Bru2.scala 167:27]
    node _T_3 = and(io_inst, UInt<32>("hfc000000")) @[Bru2.scala 168:16]
    node _T_4 = eq(UInt<32>("h94000000"), _T_3) @[Bru2.scala 168:16]
    node _T_5 = and(io_inst, UInt<32>("hfffffc1f")) @[Bru2.scala 168:39]
    node _T_6 = eq(UInt<32>("hd63f0000"), _T_5) @[Bru2.scala 168:39]
    node _T_7 = or(_T_4, _T_6) @[Bru2.scala 168:28]
    node _GEN_6 = mux(_T_7, UInt<1>("h1"), UInt<1>("h0")) @[Bru2.scala 168:52 169:16 171:16]
    node _LinkData_r_T = add(io_PC, UInt<3>("h4")) @[Bru2.scala 173:25]
    node _LinkData_r_T_1 = tail(_LinkData_r_T, 1) @[Bru2.scala 173:25]
    reg PC_r : UInt<64>, clock with :
      reset => (UInt<1>("h0"), PC_r) @[Bru2.scala 178:27]
    reg imm64_28_r : UInt<64>, clock with :
      reset => (UInt<1>("h0"), imm64_28_r) @[Bru2.scala 179:27]
    reg imm64_21_r : UInt<64>, clock with :
      reset => (UInt<1>("h0"), imm64_21_r) @[Bru2.scala 180:27]
    reg imm64_16_r : UInt<64>, clock with :
      reset => (UInt<1>("h0"), imm64_16_r) @[Bru2.scala 181:27]
    reg regRn_r : UInt<64>, clock with :
      reset => (UInt<1>("h0"), regRn_r) @[Bru2.scala 182:27]
    node _io_jumpAddr_T = add(PC_r, UInt<3>("h4")) @[Bru2.scala 190:31]
    node _io_jumpAddr_T_1 = tail(_io_jumpAddr_T, 1) @[Bru2.scala 190:31]
    node _io_jumpAddr_T_2 = eq(BJump_r, UInt<1>("h1")) @[Bru2.scala 192:16]
    node _io_jumpAddr_T_3 = eq(BLJump_r, UInt<1>("h1")) @[Bru2.scala 192:39]
    node _io_jumpAddr_T_4 = or(_io_jumpAddr_T_2, _io_jumpAddr_T_3) @[Bru2.scala 192:27]
    node _io_jumpAddr_T_5 = add(PC_r, imm64_28_r) @[Bru2.scala 192:84]
    node _io_jumpAddr_T_6 = tail(_io_jumpAddr_T_5, 1) @[Bru2.scala 192:84]
    node _io_jumpAddr_T_7 = eq(BCONJump_r, UInt<1>("h1")) @[Bru2.scala 193:19]
    node _io_jumpAddr_T_8 = eq(CBZJump_r, UInt<1>("h1")) @[Bru2.scala 193:40]
    node _io_jumpAddr_T_9 = or(_io_jumpAddr_T_7, _io_jumpAddr_T_8) @[Bru2.scala 193:27]
    node _io_jumpAddr_T_10 = eq(CBNZJump_r, UInt<1>("h1")) @[Bru2.scala 193:63]
    node _io_jumpAddr_T_11 = or(_io_jumpAddr_T_9, _io_jumpAddr_T_10) @[Bru2.scala 193:48]
    node _io_jumpAddr_T_12 = add(PC_r, imm64_21_r) @[Bru2.scala 193:84]
    node _io_jumpAddr_T_13 = tail(_io_jumpAddr_T_12, 1) @[Bru2.scala 193:84]
    node _io_jumpAddr_T_14 = eq(TBNZJump_r, UInt<1>("h1")) @[Bru2.scala 194:19]
    node _io_jumpAddr_T_15 = eq(TBZJump_r, UInt<1>("h1")) @[Bru2.scala 194:41]
    node _io_jumpAddr_T_16 = or(_io_jumpAddr_T_14, _io_jumpAddr_T_15) @[Bru2.scala 194:27]
    node _io_jumpAddr_T_17 = add(PC_r, imm64_16_r) @[Bru2.scala 194:84]
    node _io_jumpAddr_T_18 = tail(_io_jumpAddr_T_17, 1) @[Bru2.scala 194:84]
    node _io_jumpAddr_T_19 = eq(BRJump_r, UInt<1>("h1")) @[Bru2.scala 195:17]
    node _io_jumpAddr_T_20 = eq(BLRJump_r, UInt<1>("h1")) @[Bru2.scala 195:41]
    node _io_jumpAddr_T_21 = or(_io_jumpAddr_T_19, _io_jumpAddr_T_20) @[Bru2.scala 195:27]
    node _io_jumpAddr_T_22 = eq(RETJump_r, UInt<1>("h1")) @[Bru2.scala 195:65]
    node _io_jumpAddr_T_23 = or(_io_jumpAddr_T_21, _io_jumpAddr_T_22) @[Bru2.scala 195:50]
    node _io_jumpAddr_T_24 = mux(_io_jumpAddr_T_23, regRn_r, _io_jumpAddr_T_1) @[Mux.scala 101:16]
    node _io_jumpAddr_T_25 = mux(_io_jumpAddr_T_16, _io_jumpAddr_T_18, _io_jumpAddr_T_24) @[Mux.scala 101:16]
    node _io_jumpAddr_T_26 = mux(_io_jumpAddr_T_11, _io_jumpAddr_T_13, _io_jumpAddr_T_25) @[Mux.scala 101:16]
    node _io_jumpAddr_T_27 = mux(_io_jumpAddr_T_4, _io_jumpAddr_T_6, _io_jumpAddr_T_26) @[Mux.scala 101:16]
    node BHit = _BHit_T_2 @[Bru2.scala 42:22 53:11]
    node BLHit = _BLHit_T_2 @[Bru2.scala 43:22 54:11]
    node BRHit = _BRHit_T_2 @[Bru2.scala 44:22 55:11]
    node BLRHit = _BLRHit_T_2 @[Bru2.scala 45:22 56:11]
    node RETHit = _RETHit_T_2 @[Bru2.scala 46:22 57:11]
    node imm64_28 = _imm64_28_T_3 @[Bru2.scala 75:22 76:12]
    node imm64_21 = _imm64_21_T_3 @[Bru2.scala 81:22 82:12]
    node imm64_16 = bits(_imm64_16_T_3, 63, 0) @[Bru2.scala 87:22 88:12]
    io_RnIndex <= RnIndex_r @[Bru2.scala 69:14]
    io_RtIndex <= RtIndex_r @[Bru2.scala 70:14]
    io_LinkFlag <= LinkFlag_r @[Bru2.scala 174:16]
    io_LinkData <= pad(LinkData_r, 64) @[Bru2.scala 175:16]
    io_jumpAddr <= _io_jumpAddr_T_27 @[Bru2.scala 190:15]
    RnIndex_r <= mux(reset, UInt<5>("h0"), _RnIndex_r_T) @[Bru2.scala 65:{27,27} 67:13]
    RtIndex_r <= mux(reset, UInt<5>("h0"), _RtIndex_r_T) @[Bru2.scala 66:{27,27} 68:13]
    BJump_r <= mux(reset, UInt<1>("h0"), BHit) @[Bru2.scala 143:{28,28} 154:14]
    BLJump_r <= mux(reset, UInt<1>("h0"), BLHit) @[Bru2.scala 144:{28,28} 155:14]
    BRJump_r <= mux(reset, UInt<1>("h0"), BRHit) @[Bru2.scala 145:{28,28} 156:14]
    BLRJump_r <= mux(reset, UInt<1>("h0"), BLRHit) @[Bru2.scala 146:{28,28} 157:14]
    RETJump_r <= mux(reset, UInt<1>("h0"), RETHit) @[Bru2.scala 147:{28,28} 158:14]
    BCONJump_r <= mux(reset, UInt<1>("h0"), _BCONJump_r_T) @[Bru2.scala 148:{28,28} 159:14]
    CBNZJump_r <= mux(reset, UInt<1>("h0"), _CBNZJump_r_T) @[Bru2.scala 149:{28,28} 160:14]
    CBZJump_r <= mux(reset, UInt<1>("h0"), _CBZJump_r_T) @[Bru2.scala 150:{28,28} 161:14]
    TBNZJump_r <= mux(reset, UInt<1>("h0"), _TBNZJump_r_T) @[Bru2.scala 151:{28,28} 162:14]
    TBZJump_r <= mux(reset, UInt<1>("h0"), _TBZJump_r_T) @[Bru2.scala 152:{28,28} 163:14]
    LinkFlag_r <= mux(reset, UInt<1>("h0"), _GEN_6) @[Bru2.scala 166:{28,28}]
    LinkData_r <= bits(mux(reset, UInt<32>("h0"), _LinkData_r_T_1), 31, 0) @[Bru2.scala 167:{27,27} 173:16]
    PC_r <= mux(reset, UInt<64>("h0"), io_PC) @[Bru2.scala 178:{27,27} 183:17]
    imm64_28_r <= mux(reset, UInt<64>("h0"), imm64_28) @[Bru2.scala 179:{27,27} 184:17]
    imm64_21_r <= mux(reset, UInt<64>("h0"), imm64_21) @[Bru2.scala 180:{27,27} 185:17]
    imm64_16_r <= mux(reset, UInt<64>("h0"), imm64_16) @[Bru2.scala 181:{27,27} 186:17]
    regRn_r <= mux(reset, UInt<64>("h0"), io_regRn) @[Bru2.scala 182:{27,27} 187:17]
